CONTINUAL SIZE REDUCTION

Much of the power of the electronics industry comes from the versatility of semiconductor devices based on silicon. Complementary metal oxide semiconductor (CMOS) technologies make it possible to integrate digital and increasingly analogue circuitry in ever-smaller silicon chips that lie at the heart of all the products that we now take for granted – from mobile phones to high definition television and from electronic stability systems in cars to miniature medical devices.

The size of microelectronic components is defined in terms of the electronic circuit feature size on the silicon substrate. The smallest feature was for a long time expressed in microns, but the continuous technology evolution means dimensions are now less than 100 nanometre (nm) or a tenth of a micron. This has led to the use of the term 'nanoelectronics' rather than 'microelectronics' for submicron devices.

At these smaller scales, novel properties come into play and previously unimportant secondary physical effects become dominant. The goal of the nanoelectronics engineer is to take advantage of the new properties and compensate for or minimise the secondary effects, while always delivering smaller, faster and cheaper devices. So fabrication processes for these chips need new materials, processes and equipment, all of which require high levels of research effort.